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Kimberly Keeton

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Kimberly Keeton
email: kkeeton@hpl.hp.com
phone: +1.650.857.3990
fax: +1.650.857.5548
address: Hewlett Packard Laboratories
1501 Page Mill Road, MS 1U-13
Palo Alto, CA 94304-1126
web: Kim Keeton (external)
Kim Keeton (internal)

Research Interests

My current research interests are in the design, implementation and analysis of data-intensive computing systems, both in local and distributed environments.  In particular, I am interested in self-managing storage systems, the design of highly-available systems, and workload characterization.

Selected publications

Self-managing storage systems 
  • Eric Anderson, Michael Hobbs, Kimberly Keeton, Susan Spence, Mustafa Uysal, Alistair Veitch. "Hippodrome:  running circles around storage administration," Conference on File and Storage Technologies (FAST'02), Monterey, California, January 2002. PDF

  • Kimberly Keeton and Eric Anderson. "A backup appliance composed of high-capacity disk drives," Workshop on Hot Topics in Operating Systems (HotOS-VIII), May 2001. 

  • G. Alvarez, K. Keeton, A. Merchant, E. Riedel, and J. Wilkes. "Storage Systems Management," presented at ACM SIGMETRICS 2000, June 2000. Color handouts (PDF or compressed postscript).


Workload characterization
  • K. Keeton, G. Alvarez, E. Riedel, and M. Uysal. "Characterizing I/O-intensive Workload Sequentiality on Modern Disk Arrays," presented at the 4th Workshop on Computer Architecture Evaluation using Commercial Workloads (CAECW-01), before HPCA-7, January 2001. PDF handouts.

  • Z. Kurmas, K. Keeton, and R. Becker-Szendy. "I/O Workload Characterization," presented by Zack Kurmas at CAECW-01, before HPCA-7, January 2001. PDF handouts.

  • K. Keeton, A. Veitch, D. Obal, and J. Wilkes. "I/O Characterization of Commercial Workloads," presented at CAECW-00, before HPCA-6, January 2000. PDF handouts.

Intelligent storage systems
  • K. Keeton and D. A. Patterson."Exploiting Disk Intelligence for Decision Support Databases," presented at CAECW-00, before HPCA-6, January 2000.  PDF handouts.

  • A. Brown, D. Oppenheimer, K. Keeton, R. Thomas, J. Kubiatowicz, and D.A. Patterson. "ISTORE: Introspective Storage for Data-Intensive Network Services," Proceedings of the 7th Workshop on Hot Topics in Operating Systems (HotOS-VII), Rio Rico, Arizona, March 1999. PS.

  • K. Keeton, D. A. Patterson and J. M. Hellerstein. "A Case for Intelligent Disks (IDISKs)," SIGMOD Record, Vol. 27, No. 3, September 1998. Postscript. PDF.

Computer architecture support for databases
  • K. Keeton and D. Patterson. "Towards a Simplified Database Workload for Computer Architecture Evaluations," presented at the Workshop on Workload Characterization, Austin, Texas, October 1999. In Workload Characterization for Computer System Design, edited by L. K. John and A. M. Maynard, Kluwer Academic Publishers, 2000, ISBN 0-7923-7777-x. PDF.

  • K. Keeton. "Computer Architecture Support for Database Applications," PhD Dissertation, University of California at Berkeley, July 1999. Gzipped Postscript (0.6 MB). PDF (1.1 MB).

  • K. Keeton, D. A. Patterson, Y. Q. He, R. C. Raphael, and W. E. Baker. "Performance Characterization of a Quad Pentium Pro SMP Using OLTP Workloads," Proceedings of the 25th International Symposium on Computer Architecture, Barcelona, Spain, June 1998. Postscript. PDF. Extended version published as UC Berkeley Computer Science Division Technical Report UCB//CSD-98-1001, April 1998. Postscript. PDF.

IRAM (Intelligent Processor in Memory)
  • K. Keeton, R. Arpaci-Dusseau, D. A. Patterson. "IRAM and SmartSIMM: Overcoming the I/O Bus Bottleneck," Workshop on Mixing Logic and DRAM at ISCA '97, June 1997. Postscript.

  • S. Perissakis, C. Kozyrakis, T. Anderson, K. Asanovic, N. Cardwell, R. Fromm, K. Keeton, D. Patterson, R. Thomas, and K. Yelick. Draft of "Scaling Processors to 1 Billion Transistors and Beyond: IRAM," Submitted for publication. Postscript.

  • D. Patterson, T. Anderson, N. Cardwell, R. Fromm, K. Keeton, C. Kozyrakis, R. Thomas, and K. Yelick. "A Case for Intelligent DRAM: IRAM," to appear in IEEE Micro, April 1997. Postscript (655K) PDF (89K)

  • D. Patterson, T. Anderson, N. Cardwell, R. Fromm, K. Keeton, C. Kozyrakis, R. Thomas, and K. Yelick. "Intelligent RAM (IRAM): Chips that Remember and Compute," 1997 IEEE International Solid-State Circuits Conference, San Francisco, CA, February 1997. Postscript (67K) PDF (16K)

Professional activities
  • During the Spring 2002 semester, I'm co-teaching CS262B at UC Berkeley with Prof. Mike Franklin.  This graduate-level course is the second semester in a two-semester sequence on operating systems and database systems. 
  • Program committee (PC) member for:
    • 10th Intl. Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-X)
    • Intl. Performance and Dependability Symposium (DSN/IPDS '02)
    • 8th Intl. Symposium on High-Performance Computer Architecture (HPCA-8)
    • Workshop on Novel Uses of System Area Networks (SAN-1), held at HPCA-8
  • Co-organizer of:
    • Workshop on Computer Architecture Evaluation using Commercial Workloads, held before HPCA:  CAECW-02, CAECW-01 (with Russell Clapp (IBM), Ashwini Nanda (IBM) and Josep Torrellas (UIUC)
    • Workshop on Evaluating and Architecting System dependabilitY (EASY), held before the joint 2001 sessions of ISCA and DSN (with Steve Lumetta (UIUC)
Other interests

I sing in a 40-voice choir called the Pacific Mozart Ensemble.  Despite our name, we perform a wide repertoire of music, ranging from Baroque to Classical to modern to jazz and pop a capella.  Learn more at http://www.pacificmozart.org/.

Last modified: Mon Mar  4 17:16:33 PST 2002 by Kimberly Keeton (kkeeton@hpl.hp.com)

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