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February 1995, Article 16 |
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Synthesis of 100% Delay Fault Testable Combinational Circuits by Cube Partitioning
High-performance systems require rigorous testing for path delay faults. A synthesis algorithm is proposed that produces a 100% path delay fault testable function with a minimal set of test pins
by William K. Lam
 Article 16 - feb95a16.pdf
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