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A New, Flexible Sequencer Architecture for Testing Complex Serial Bit Streams
Based on a generic model of serial communication systems, this architecture dramatically reduces the time needed to programfunctional and in-circuit tests for devices with serial interfaces. It is implemented in a new Serial Test Card and Serial Test Language for the HP 3070 family of board test systems.
by Robert E. McAuliffe, James L. Benson, and Christopher B. Cain
 Article 13 - feb95a13.pdf
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