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February 1996,
Volume 47, Issue 1
Articles
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Symmetric Multiprocessing Workstations and Servers System-Designed for High Performance and Low Cost
by Matt J. Harline, Brendan A. Voge, Loren P. Staley, and Badir M. Mousa
Sidebar: K-Class Power System
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A High-Performance, Low-Cost Multiprocessor Bus for Workstations and Midrange Servers by William R. Bryg, Kenneth K. Chan, and Nicholas S. Fiduccia
Sidebar: Runway Bus Electrical Design Considerations
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Design of the HP PA 7200 CPU by Kenneth K. Chan, Cyrus C. Hay, John R. Keller, Gordon P. Kurpanek, Francis X. Schumacher, and Jason Zheng
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Verification, Characterization, and Debugging of the HP PA 7200 Processor
by Thomas B. Alexander, Kent A. Dickey, David N. Goldberg, Ross V. La Fetra, James R. McGee, Nazeem Noordeen, and Akshya Prakash
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A New Memory System Design for Commercial and Technical Computing Products
by Thomas R. Hotchkiss, Norman D. Marschke, and Richard M. McClosky
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Hardware Cache Coherent Input/Output
by Todd J. Kjos, Helen Nusbaum, Michael K. Traynor, and Brendan A. Voge
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A 1.0625-Gbit /s Fibre Channel Chipset with Laser Driver
by Justin S. Chang, Richard Dugan, Benny W.H. Lai, and Margaret M. Nakamoto
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Applying the Code Inspection Process to Hardware Descriptions
by Joseph J. Gilray
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Overview of Code-Domain Power, Timing, and Phase Measurements
by Raymond A. Birgenheier
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