TITLE: Overview of research in the Technical Computing Research Group
SPEAKER: Jeff Collard [HP Labs]
DATE: 2:00 - 3:00 P.M., Friday January 23, 2004
LOCATION: Sigma, 1 L (PA)
HOST: Vinay Deolalikar
ABSTRACT:
This talk presents two topics the Technical Computing Research Group (TCRG)
is currently working on. The first one is compiler optimizations for parallel
languages. The Unified Parallel C (UPC) language is one of these languages, and
HP is still the only company offering a UPC compiler product. I'll briefly
present UPC, and drill down into two issues: inadvertent data races, and barrier
softening -- that is, the removal of global barrier synchronizations, or their
replacement by less costly point-to-point synchronizations. The second is,
generally speaking, system architecture. As an example of this research, I'll
present loads squared, a technique to reduce the cost of indirect loads with
high miss rates.
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