Jichuan Chang

Senior Research scientist
Intelligent Infrastructure Lab
Palo Alto

Biography

Jichuan Chang is a Senior Research Scientist at HP Labs. His research interests are in computer system architecture and memory systems, with a focus on building cost and energy efficient next generation datacenters. His past research contributions include component-based software reuse, software architecture support for software construction and runtime adaptation, multiprocessor cache coherence and chip multiprocessor caching. His recent contributions leverage emerging technology trends and cross-disciplinary co-designs to improve server efficiency (e.g., low-TCO microBlades, disaggregated memory, and dematerialized datacenter). Dr. Chang received his B.S. and M.S. degrees from Beijing University and his Ph.D. from University of Wisconsin-Madison. He has two papers selected as IEEE Micro's Top Picks.

 

Research interests

  • Computer systems architecture
  • Memory systems
  • Software architecture

Publications

  • Doe Hyun Yoon, Naveen Muralimanohar, Jichuan Chang, Parthasarathy Ranganathan, Norman. P. Jouppi. “FREE-p: Protecting Non-Volatile Memory against both Hard and Soft Errors.” HPCA, 2011.
  • Jichuan Chang, Justin Meza, Parthasarathy Ranganathan, Amip Shah, Cullen Bash. “Greens server design: beyond operational energy to sustainability”, HotPower, October 2010.
  • Justin Meza, Cullen Bash, Jichuan Chang, Parthasarathy Ranganathan, Amip Shah, Rocky Shih. “Sustainability-aware Design of Green Data Centers”. ASME 2010 International Mechanical Engineering Congress & Exposition (IMECE), November, 2010.
  • Mehul Shah, Parthasarathy Ranganathan, Jichuan Chang, Niraj Tolia, David Roberts, and Trevor Mudge. “Data Dwarfs: Motivating a Coverage Set for Future Large Data Center Workloads”, In Proceedings of the 2010 Workshop on Architecture Concerns for Large Datacenters, Saint Malo, France, June 2010.
  • Kevin Lim, Jichuan Chang, Jose Renato Santos, Yoshio Turner, Trevor Mudge, Parthasarathy Ranganathan, Steven Reinhardt, Thomas Wenisch. “Hypervisor-based Prototyping of Disaggregated Memory and Benefits of VM Consolidation,” Poster, ASPLOS 2010.
  • Kevin Lim, Jichuan Chang, Parthasarathy Ranganathan, Trevor Mudge, Steven K. Reinhardt, Thomas Wenisch. Disaggregated Memory for Expansion and Sharing in Blade Servers. In Proceedings of the 36th Annual International Symposium on Computer Architecture (ISCA-36), Austin, TX, June 2009.
  • Kevin Lim, Parthasarathy Ranganathan, Jichuan Chang, Chandrakant Patel, Trevor Mudge, Steve Reinhardt. Server Designs for Warehouse-Computing Environments. IEEE Micro 29(1), Micro's Top Picks, 2009.
  • Kevin Lim, Parthasarathy Ranganathan, Jichuan Chang, Chandrakant Patel, Trevor Mudge, Steve Reinhardt. Understanding and Designing New System Architectures for Emerging Warehouse-Computing Environments. In Proceedings of the 35th Annual International Symposium on Computer Architecture (ISCA-35), Beijing, China, June 2008. (Related full paper accepted by HP Tech Con 2008).
  • Chapter 5 exercise (Large and Fast: Exploring Memory Hierarchy) to appear in the classic textbook - Computer Organization and Design: The Hardware/Software Interface (4th edition), Elsevier.
  • Jichuan Chang and Guri Sohi. Cooperative Cache Partitioning for Chip Multiprocessors. In Proceedings of the 21st ACM International Conference on Supercomputing (ICS 07), Seattle, Washington, June 2007.
  • Jichuan Chang and Guri Sohi. Cooperative Caching for Chip Multiprocessors. In Proceedings of the 33rd Annual International Symposium on Computer Architecture (ISCA-33), Boston, Massachusetts, June 2006.
  • Jaehyuk Huh, Doug Burger, Jichuan Chang and Guri Sohi. Speculative Incoherent Cache Protocols.  IEEE Micro 24(6) - Micro's Top Picks, Nov/Dec 2004.
  • Jaehyuk Huh, Jichuan Chang, Doug Burger and Guri Sohi. Coherence Decoupling: Making Use of Incoherence. In 11th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-XI), Boston, Massachusetts, October 2004.
  • Jichuan Chang, Jaehyuk Huh, Rajagopalan Desikan, Doug Burger and Guri Sohi. Using Coherent Value Speculation to Improve Multiprocessor Performance. In the First Value Prediction Workshop held in Conjunction with ISCA-30, San Diego, California, June 2003.
  • David Garlan, Bradley Schemerl and Jichuan Chang. Using Gauges for Architectural-based Monitoring and Adaptation. In Working Conference on Complex and Dynamic Systems Architecture, Australia, December, 2001.
  • Hong Mei, Jichuan Chang, and Fuqing Yang. Software Component Composition based on ADL and Middleware. Science in China (F), Vol. 44(2), pp. 136-151, 2001.
  • Hong Mei, Jichuan Chang and Fuqing Yang. Composing Software Components at Architectural Level. In the 16th International Conference on Software - Theory and Practice (ICS2000), Beijing, China, 2000.
  • Jichuan Chang, Keqin Li, Lifeng Guo, Hong Mei and Fuqing Yang. Representing and Retrieving Reusable Software Components in Jadebird System. ACTA ELECTRONICA SINICA, Vol.28, No.8, pp. 20-23, 2000.
  • Wu Qiong, Chang Jichuan, Mei Hong and Yang Fuqing. JBCDL: An Object-Oriented Component Description Language. In the Proceedings of TOOLS Asia, 1997.

    • Professional activities

    • Reviewer for various computer architecture journals and conferences.
    • PC member for ICCD 2009, WEED 2010 and ICCD 2010.
    • NSF panelist, 2009 and 2010.