Nanostore expert has been named HP Fellow
October 2011
Partha Ranganathan, one of the leading technologists in the area of server and datacenter architecture innovation, was named an HP Fellow in August 2011.
Ranganathan, who joined HP Labs in 2000, currently leads a research program on future data-centric data centers at HP Labs. His broader research interests are in energy efficiency and systems architecture and modeling. He has worked extensively in these areas including key contributions around energy-aware user interfaces, heterogeneous multi-core processors, power capping and federated enterprise power management, energy modeling and benchmarking, disaggregated blade server architectures, and most recently, storage hierarchy and systems redesign for non-volatile memory. Partha received his B.Tech degree from the Indian Institute of Technology, Madras, and his M.S. and Ph.D. from Rice University, Houston.
New work in system architectures and enterprise power and cooling
In the last few years, Ranganathan has formulated and executed on an ambitious agenda in rethinking system architectures for servers and datacenters, with strong impact to both industry and academia. His blades++ vision of disaggregated system design is an important part of HP’s current successful blade server strategy. One aspect of this vision, µblades, first introduced low-power processors for ultra-dense cloud servers. This work is reflected in several industry products (including from HP) and has also triggered several follow-on academic studies. Other aspects of this vision – memory blades (disaggregated memory sharing) and mchannels/mbrokers (federated architectures for server manageability) – have also had significant impact in industry and academia.
Partha has also worked extensively on enterprise power and cooling; notably, his power-capping work is now widely used. Partha recently proposed new nanostore architectures for future data-centric workloads, with potential order-of-magnitude improvements in energy efficiency and is currently evaluating cross-cutting optimizations across hardware and software to further develop this vision.
Publications, patents and awards
Ranganathan’s research has also led to more than 100 publications, including several widely-recognized pioneering studies and cross-disciplinary work. Notably, he is on the ISCA hall of fame (one of very few industrial researchers), and his papers have been cover features in IEEE Computer five times. He has more than 75 patent filings and his body of work has won him extensive press coverage including the New York Times, Wall Street Journal, Business Week, and Slashdot. He has been named one of the world's top young innovators by MIT Technology Review, and has received Rice University's Outstanding Young Engineering Alumni award and an IIT Madras Alumni Service Award.